Extraction and Simulation of Realistic CMOS Faults Using Inductive Fault Analysis
Inductive fault analysis was a subject of research beginning in the middle 1980s, including several significant projects at Carnegie Mellon University. IFA was a major departure from traditional high level fault modeling because it accounted for an IC's technology, fabrication defect statistics, realistic defect occurrences, and physical layout. This paper presents the results of automating and applying IFA to five commercial CMOS ICs with the use of a fault extraction program. The details provided by this paper and the evaluation of the results relative to the traditional single stuck-at model was an important contribution and encouraged subsequent research into this topic.
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