High-Volume Microprocessor Test Escapes: An Analysis of Defects
our Tests are Missing
This paper provides highly useful insight into the day-to-day high volume microprocessor manufacturing process and testing business. It gave a rare and valuable view of how Intel, at that time, achieved low defect levels in this highly competitive market area. Of equal or greater significance, it showed that the stuck-at fault model did not accurately model the defects and test escapes described in the paper and was one of several key early indicators of the future importance of open circuits and resistive defects and their test challenges for deep submicron technologies. The factors addressed in this paper are still relevant to current advanced technologies and are important for those using commercial, off-the-shelf ICs in various applications, including military and space systems.
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